ATXMEGA128B1 Datasheet, PDF (64/138 Pages) ATMEL Corporation – 8/16-bit Atmel XMEGA B1 Microcontroller

Mnemonics
IN
OUT
PUSH
POP
XCH
Operands
Rd, A
A, Rr
Rr
Rd
Z, Rd
Description
In From I/O Location
Out To I/O Location
Push Register on Stack
Pop Register from Stack
Exchange RAM location
LAS
Z, Rd
Load and Set RAM location
LAC
Z, Rd
Load and Clear RAM location
LAT
Z, Rd
Load and Toggle RAM location
LSL
LSR
ROL
ROR
ASR
SWAP
BSET
BCLR
SBI
CBI
BST
BLD
SEC
CLC
SEN
CLN
SEZ
CLZ
SEI
CLI
SES
CLS
Rd
Rd
Rd
Rd
Rd
Rd
s
s
A, b
A, b
Rr, b
Rd, b
Logical Shift Left
Logical Shift Right
Rotate Left Through Carry
Rotate Right Through Carry
Arithmetic Shift Right
Swap Nibbles
Flag Set
Flag Clear
Set Bit in I/O Register
Clear Bit in I/O Register
Bit Store from Register to T
Bit load from T to Register
Set Carry
Clear Carry
Set Negative Flag
Clear Negative Flag
Set Zero Flag
Clear Zero Flag
Global Interrupt Enable
Global Interrupt Disable
Set Signed Test Flag
Clear Signed Test Flag
Operation
Rd  I/O(A)
I/O(A)  Rr
STACK  Rr
Rd  STACK
Temp  Rd,
Rd  (Z),
(Z)  Temp
Temp  Rd,
Rd  (Z),
(Z)  Temp v (Z)
Temp  Rd,
Rd  (Z),
(Z)  ($FFh – Rd)  (Z)
Temp  Rd,
Rd  (Z),
(Z)  Temp  (Z)
Bit and bit-test instructions
Rd(n+1)  Rd(n),
Rd(0)  0,
C  Rd(7)
Rd(n)  Rd(n+1),
Rd(7)  0,
C  Rd(0)
Rd(0)  C,
Rd(n+1)  Rd(n),
C  Rd(7)
Rd(7)  C,
Rd(n)  Rd(n+1),
C  Rd(0)
Rd(n)  Rd(n+1), n=0..6
Rd(3..0)  Rd(7..4)
SREG(s)  1
SREG(s)  0
I/O(A, b)  1
I/O(A, b)  0
T  Rr(b)
Rd(b)  T
C1
C0
N1
N0
Z1
Z0
I1
I0
S1
S0
Flags
None
None
None
None
None
None
None
None
Z,C,N,V,H
Z,C,N,V
Z,C,N,V,H
Z,C,N,V
Z,C,N,V
None
SREG(s)
SREG(s)
None
None
T
None
C
C
N
N
Z
Z
I
I
S
S
#Clocks
1
1
1 ⁽¹⁾
2 ⁽¹⁾
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
XMEGA B1 [DATASHEET] 64
8330C–AVR–07/2012