ATXMEGA384C3_14 Datasheet, PDF (62/125 Pages) ATMEL Corporation – 8/16-bit Atmel XMEGA C3 Microcontroller

Mnemonics
CLI
SES
CLS
SEV
CLV
SET
CLT
SEH
CLH
Operands
Description
Global Interrupt Disable
Set Signed Test Flag
Clear Signed Test Flag
Set Two’s Complement Overflow
Clear Two’s Complement Overflow
Set T in SREG
Clear T in SREG
Set Half Carry Flag in SREG
Clear Half Carry Flag in SREG
Operation
I0
S1
S0
V1
V0
T1
T0
H1
H0
Flags
I
S
S
V
V
T
T
H
H
MCU control instructions
BREAK
Break
(See specific descr. for BREAK)
None
NOP
No Operation
None
SLEEP
Sleep
(see specific descr. for Sleep)
None
WDR
Notes:
Watchdog Reset
(see specific descr. for WDR)
None
1. Cycle times for data memory accesses assume internal memory accesses, and are not valid for accesses via the external RAM interface.
2. One extra cycle must be added when accessing internal SRAM.
#Clocks
1
1
1
1
1
1
1
1
1
1
1
1
1
XMEGA C3 [DATASHEET]
62
Atmel-8361F-AVR-ATxmega384C3-Datasheet–11/2014