ATXMEGA384C3_14 Datasheet, PDF (15/125 Pages) ATMEL Corporation – 8/16-bit Atmel XMEGA C3 Microcontroller

7.12
Flash and EEPROM Page Size
The flash program memory and EEPROM data memory are organized in pages. The pages are word accessible for the
flash and byte accessible for the EEPROM.
Table 7-2 on page 15 shows the Flash Program Memory organization and Program Counter (PC) size. Flash write and
erase operations are performed on one page at a time, while reading the Flash is done one byte at a time. For Flash
access the Z-pointer (Z[m:n]) is used for addressing. The most significant bits in the address (FPAGE) give the page
number and the least significant address bits (FWORD) give the word in the page.
Table 7-2. Number of Words and Pages in the Flash
Devices
PC size Flash size Page size FWORD FPAGE
bits
bytes
words
ATxmega384C3
18
384K + 8K
256
Z[8:1]
Z[19:9]
Application
Size
No. of
pages
384K
768
Boot
Size
No. of
pages
8K
16
Table 7-3 shows EEPROM memory organization. EEEPROM write and erase operations can be performed one page or
one byte at a time, while reading the EEPROM is done one byte at a time. For EEPROM access the NVM address
register (ADDR[m:n]) is used for addressing. The most significant bits in the address (E2PAGE) give the page number
and the least significant address bits (E2BYTE) give the byte in the page.
Table 7-3. Number of Bytes and Pages in the EEPROM
Devices
ATxmega384C3
EEPROM
Size
4K
Page size
bytes
32
E2BYTE
ADDR[4:0]
E2PAGE
ADDR[11:5]
No. of pages
128
XMEGA C3 [DATASHEET]
15
Atmel-8361F-AVR-ATxmega384C3-Datasheet–11/2014