AT24C02C Datasheet, PDF (6/23 Pages) ATMEL Corporation – Two-wire Serial Electrically Erasable and Programmable Read-only Memory

3. Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA
pin may change only during SCL low time periods (see Figure 5-2 on page 8). Data changes during SCL high
periods will indicate a start or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any
other command (see Figure 5-3 on page 8).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the
stop command will place the EEPROM in a standby power mode (see Figure 5-3 on page 8).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words.
The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock
cycle.
STANDBY MODE: The Atmel^® AT24C02C features a low-power standby mode which is enabled: (a) upon power-
up and (b) after the receipt of the STOP bit and the completion of any internal operations.
2-Wire Software Reset: After an interruption in protocol, power loss or system reset, any 2-wire part can be reset
by following these steps: (a) Create a start bit condition, (b) clock 9 cycles, (c) create another start bit followed by
stop bit condition as shown below. The device is ready for next communication after above steps have been
completed.
Figure 3-1. Software reset
Start bit
Dummy Clock Cycles
Start bit
Stop bit
SCL
1
2
3
8
9
SDA
6 Atmel AT24C02C
8700D–SEEPR–8/10