AT24C02C Datasheet, PDF (3/23 Pages) ATMEL Corporation – Two-wire Serial Electrically Erasable and Programmable Read-only Memory

Atmel AT24C02C
1. Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and
negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open-collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired
for the Atmel^® AT24C02C. As many as eight 2K devices may be addressed on a single bus system (device
addressing is discussed in detail under the Device Addressing section).
WRITE PROTECT (WP): AT24C02C has a write protect pin that provides hardware data protection. The write
protect pin allows normal read/write operations when connected to ground (GND). When the write protect pin is
connected to V_CC, the write protection feature is enabled and operates as shown in Table 1-1.
Table 1-1. Write Protect
WP Pin
Status
At V_CC
At GND
Part of the Array Protected
Atmel 24C02C
Full (2K) Array
Normal Read/Write Operations
3
8700D–SEEPR–8/10