AT32AP7002_1 Datasheet, PDF (599/896 Pages) ATMEL Corporation – AVR32 32-bit Microcontroller

31.3 Block Diagram
Figure 31-1. Block diagram:
AT32AP7002
UTMI
Peripheral Bus
Interface
ctrl
status
USB2.0
CORE
Rd/Wr/Ready
HSB1
DMA
HSB0
EPT
Alloc
Local
HSB
Slave
interface
Master
HSB
Multiplexer
Slave
PB bus
HSB bus
HSB bus
16/8 bits
DPRAM
32 bits
USB Clock
Domain
System Clock
Domain
31.4 Product Dependencies
31.4.1 Power Management
31.4.2 Interrupt
The USBA clock is generated by the Power Manager. Before using the USBA, the programmer
must ensure that the USBA clock is enabled in the Power Manager.
To prevent bus errors the USBA operation must be terminated before entering sleep mode.
The USB HS PHY clock has to be enabled before using the USBA. The description of this clock
can be found in the Peripherals chapter under Clock Connections.
The USBA interface has an interrupt line connected to the Interrupt Controller. Handling the
USBA interrupt requires programming the interrupt controller before configuring the USBA.
32054F–AVR32–09/09
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