AT32AP7002_1 Datasheet, PDF (596/896 Pages) ATMEL Corporation – AVR32 32-bit Microcontroller

30.8.13 Interrupt Disable Register
Name:
Access Type:
Offset:
IDR
Write-only
0x48
Reset Value:
–
31
UNRE
23
–
15
–
7
–
30
OVRE
22
DTOE
14
–
6
–
29
–
21
DCRCE
13
–
5
NOTBUSY
28
–
20
RTOE
12
–
4
DTIP
• UNRE: UnderRun Interrupt Disable
• OVRE: Overrun Interrupt Disable
• DTOE: Data Time-out Error Interrupt Disable
• DCRCE: Data CRC Error Interrupt Disable
• RTOE: Response Time-out Error Interrupt Disable
• RENDE: Response End Bit Error Interrupt Disable
• RCRCE: Response CRC Error Interrupt Disable
• RDIRE: Response Direction Error Interrupt Disable
• RINDE: Response Index Error Interrupt Disable
• SDIOIRQB: SDIO Interrupt for Slot B Interrupt Enable
• SDIOIRQA: SDIO Interrupt for Slot A Interrupt Enable
• NOTBUSY: Data Not Busy Interrupt Disable
• DTIP: Data Transfer in Progress Interrupt Disable
• BLKE: Data Block Ended Interrupt Disable
• TXRDY: Transmit Ready Interrupt Disable
• RXRDY: Receiver Ready Interrupt Disable
• CMDRDY: Command Ready Interrupt Disable
0 = No effect.
1 = Disables the corresponding interrupt.
AT32AP7002
27
–
19
RENDE
11
–
3
BLKE
26
–
18
RCRCE
10
–
2
TXRDY
25
–
17
RDIRE
9
SDIOIRQB
1
RXRDY
24
–
16
RINDE
8
SDIOIRQA
0
CMDRDY
32054F–AVR32–09/09
596