SAM7SE256_14 Datasheet, PDF (552/682 Pages) ATMEL Corporation – Internal High-speed Flash

37.6.10 PWM Channel Duty Cycle Register
Name:
PWM_CDTYx
Access:
Read/Write
31
30
29
28
27
26
25
24
CDTY
23
22
21
20
19
18
17
16
CDTY
15
14
13
12
11
10
9
8
CDTY
7
6
5
4
3
2
1
0
CDTY
Only the first 16 bits (internal channel counter size) are significant.
• CDTY: Channel Duty Cycle
Defines the waveform duty cycle. This value must be defined between 0 and CPRD (PWM_CPRx).
552 SAM7SE512/256/32
6222H–ATARM–25-Jan-12