SAM7S161_14 Datasheet, PDF (543/775 Pages) ATMEL Corporation – ARM-based Flash MCU

If the ADC_CDR is not read before further incoming data is converted, the corresponding Overrun Error (OVRE)
flag is set in the Status Register (ADC_SR).
In the same way, new data converted when DRDY is high sets the bit GOVRE (General Overrun Error) in
ADC_SR.
The OVRE and GOVRE flags are automatically cleared when ADC_SR is read.
Figure 36-3. GOVRE and OVREx Flag Behavior
ADTRG
CH0
(ADC_CHSR)
CH1
(ADC_CHSR)
ADC_LCDR
Undefined Data
Data A
Data B
Read ADC_SR
Data C
ADC_CDR0
Undefined Data
Data A
Data C
ADC_CDR1
Undefined Data
Data B
EOC0
(ADC_SR)
Conversion
Conversion
Read ADC_CDR0
EOC1
(ADC_SR)
Conversion
Read ADC_CDR1
GOVRE
(ADC_SR)
DRDY
(ADC_SR)
OVRE0
(ADC_SR)
Warning: If the corresponding channel is disabled during a conversion or if it is disabled and then reenabled during
a conversion, its associated data and its corresponding EOC and OVRE flags in ADC_SR are unpredictable.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
543