ATMEGA128RFA1_11 Datasheet, PDF (490/560 Pages) ATMEL Corporation – 8-bit Microcontroller with Low Power 2.4GHz Transceiver for ZigBee and IEEE 802.15.4

Figure 31-19. State Machine Sequence for Changing/Reading the Data Word
1
Test-Logic-Reset
0
0
Run-Test/Idle ¹
Select-DR Scan ¹
Select-IR Scan ¹
0
1 _Capture-DR
0
1
Capture-IR
0
0
Shift-DR
0
Shift-IR
0
1
Exit1-DR
1
1
Exit1-IR
1
0
0
Pause-DR
0
Pause-IR
0
1
0
Exit2-DR
1
0
Exit2-IR
1
1
Update-DR
1
0
Update-IR
1
0
31.9.11 Flash Data Byte Register
The Flash Data Byte Register provides an efficient way to load the entire Flash page
buffer before executing Page Write, or to read out/verify the content of the Flash. A
state machine sets up the control signals to the Flash and senses the strobe signals
from the Flash, thus only the data words need to be shifted in/out.
The Flash Data Byte Register actually consists of the 8-bit scan chain and an 8-bit
temporary register. During page load, the Update-DR state copies the content of the
scan chain over to the temporary register and initiates a write sequence that within 11
TCK cycles loads the content of the temporary register into the Flash page buffer. The
AVR automatically alternates between writing the low and the high byte for each new
Update-DR state, starting with the low byte for the first Update-DR encountered after
entering the PROG_PAGELOAD command. The Program Counter is pre-incremented
before writing the low byte, except for the first written byte. This ensures that the first
data is written to the address set up by PROG_COMMANDS, and loading the last
location in the page buffer does not make the Program Counter increment into the next
page.
490 _{ATmega128RFA1}
8266C-MCU Wireless-08/11