ATMEGA128RFA1_11 Datasheet, PDF (105/560 Pages) ATMEL Corporation – 8-bit Microcontroller with Low Power 2.4GHz Transceiver for ZigBee and IEEE 802.15.4

Register Bits
ATmega128RFA1
Value
0x01
0x02
0x06
0x08
0x09
0x0F
0x11
0x12
0x16
0x19
Description
BUSY_RX
BUSY_TX
RX_ON
TRX_OFF
PLL_ON
SLEEP
BUSY_RX_AACK
BUSY_TX_ARET
RX_AACK_ON
TX_ARET_ON
0x1F
STATE_TRANSITION_IN_PROGRESS
9.12.6 TRX_STATE – Transceiver State Control Register
Bit
7
6
5
NA ($142)
Read/Write
Initial Value
Bit
TRAC_STATUS2 TRAC_STATUS1 TRAC_STATUS0
R
R
R
0
0
0
3
2
1
NA ($142)
Read/Write
Initial Value
TRX_CMD3
RW
0
TRX_CMD2
RW
0
TRX_CMD1
RW
0
4
TRX_CMD4
RW
0
0
TRX_CMD0
RW
0
TRX_STATE
TRX_STATE
The states of the radio transceiver are controlled via register TRX_STATE using
register bits TRX_CMD. The read-only register bits TRAC_STATUS indicate the status
or result of an Extended Operating Mode transaction. A successful state transition shall
be confirmed by reading register bits TRX_STATUS. This register is used for both Basic
and Extended Operating Mode.
• Bit 7:5 – TRAC_STATUS2:0 - Transaction Status
The status of the RX_AACK and TX_ARET procedure is indicated by register bits
TRAC_STATUS. TRAC_STATUS is only valid in Extended Operating Modes (note,
TRAC_STATUS is valid 2us after the respective procedure is finished by TX_END or
RX_END IRQ). Details of the algorithm and a description of the status information are
given in the RX_AACK_ON and TX_ARET_ON sections of the data-sheet. Even though
the reset value for register bits TRAC_STATUS is 0, the RX_AACK and TX_ARET
procedures set the register bits to TRAC_STATUS = 7 (INVALID) when it is started. Not
all status values are used in both RX_AACK and TX_ARET transactions. In TX_ARET
the status SUCCESS_DATA_PENDING indicates a successful reception of an ACK
frame with frame pending bit set to 1. In RX_AACK the status
SUCCESS_WAIT_FOR_ACK indicates an ACK frame is about to sent in RX_AACK
slotted acknowledgment. Slotted acknowledgment operation must be enabled with the
SLOTTED_OPERATION bit of register XAH_CTRL_0. The application software must
set the SLPTR bit of register TRXPWR at the next back-off slot boundary in order to
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