ATA6616C_14 Datasheet, PDF (261/274 Pages) ATMEL Corporation – 8K/16K Flash Microcontroller with LIN Transceiver, 5V Regulator and Watchdog

4.26 Register Summary (Continued)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
0x3D (0x5D) SPL
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
32
0x3C (0x5C) Reserved
0x3B (0x5B) Reserved
0x3A (0x5A) Reserved
0x39 (0x59) Reserved
0x38 (0x58) Reserved
0x37 (0x57) SPMCSR
–
RWWSB SIGRD
CTPB
RFLB PGWRT PGERS SPMEN
217
0x36 (0x56) Reserved
–
–
–
–
–
–
–
–
0x35 (0x55) MCUCR
–
BODS BODSE
PUD
–
–
–
–
65, 90
0x34 (0x54) MCUSR
–
–
–
–
WDRF
BORF
EXTRF
PORF
70
0x33 (0x53) SMCR
–
–
–
–
–
SM1
SM0
SE
65
0x32 (0x52) Reserved
0x31 (0x51) DWDR DWDR7 DWDR6 DWDR5 DWDR4 DWDR3 DWDR2 DWDR1 DWDR0
214
0x30 (0x50) ACSR
ACD
ACIRS
ACO
ACI
ACIE
ACIC
ACIS1
ACIS0
210
0x2F (0x4F) Reserved
0x2E (0x4E) SPDR
SPD7
SPD6
SPD5
SPD4
SPD3
SPD2
SPD1
SPD0
153
0x2D (0x4D) SPSR
SPIF
WCOL
–
–
–
–
–
SPI2X
153
0x2C (0x4C) SPCR
SPIE
SPE
DORD
MSTR
CPOL
CPHA
SPR1
SPR0
151
0x2B (0x4B) GPIOR2 GPIOR27 GPIOR26 GPIOR25 GPIOR24 GPIOR23 GPIOR22 GPIOR21 GPIOR20
45
0x2A (0x4A) GPIOR1 GPIOR17 GPIOR16 GPIOR15 GPIOR14 GPIOR13 GPIOR12 GPIOR11 GPIOR10
45
0x29 (0x49) Reserved
0x28 (0x48) OCR0A OCR0A7 OCR0A6 OCR0A5 OCR0A4 OCR0A3 OCR0A2 OCR0A1 OCR0A0
116
0x27 (0x47) TCNT0 TCNT07 TCNT06 TCNT05 TCNT04 TCNT03 TCNT02 TCNT01 TCNT00
115
0x26 (0x46) TCCR0B FOC0A
–
–
–
–
CS02
CS01
CS00
115
0x25 (0x45) TCCR0A COM0A1 COM0A0
–
–
–
–
WGM01 WGM00
113
0x24 (0x44) Reserved
0x23 (0x43) GTCCR
TSM
–
–
–
–
–
PSR0
PSR1
118, 119
0x22 (0x42) EEARH⁽¹⁾
–
–
–
–
–
–
–
EEAR8
43
0x21 (0x41) EEARL EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1
EEAR0
43
0x20 (0x40) EEDR
EEDR7 EEDR6 EEDR5 EEDR4 EEDR3 EEDR2 EEDR1
EEDR0
44
0x1F (0x3F) EECR
–
–
EEPM1 EEPM0 EERIE EEMPE
EEPE
EERE
44
0x1E (0x3E) GPIOR0 GPIOR07 GPIOR06 GPIOR05 GPIOR04 GPIOR03 GPIOR02 GPIOR01 GPIOR00
45
0x1D (0x3D) EIMSK
–
–
–
–
–
–
INT1
INT0
80
0x1C (0x3C) EIFR
–
–
–
–
–
–
INTF1
INTF0
81
0x1B (0x3B) PCIFR
–
–
–
–
–
–
PCIF1
PCIF0
82
0x1A (0x3A) Reserved
0x19 (0x39) Reserved
Notes: 1. Address bits exceeding EEAMSB (Table 4-74 on page 225) are don’t care.
2. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory
addresses should never be written.
3. I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
4. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVR^®s, the CBI and
SBI instructions will only operate on the specified bit, and can therefore be used on registers containing such status
flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
5. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel^®
ATtiny87/167 is a complex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 - 0xFF in SRAM, only the
ST/STS/STD and LD/LDS/LDD instructions can be used.
ATA6616C/ATA6617C [DATASHEET] 261
9132I–AUTO–06/14