ATA6616C_14 Datasheet, PDF (259/274 Pages) ATMEL Corporation – 8K/16K Flash Microcontroller with LIN Transceiver, 5V Regulator and Watchdog

4.26 Register Summary (Continued)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
(0xA2)
Reserved
(0xA1)
Reserved
(0xA0)
Reserved
(0x9F)
Reserved
(0x9E)
Reserved
(0x9D) Reserved
(0x9C) Reserved
(0x9B)
Reserved
(0x9A)
Reserved
(0x99)
Reserved
(0x98)
Reserved
(0x97)
Reserved
(0x96)
Reserved
(0x95)
Reserved
(0x94)
Reserved
(0x93)
Reserved
(0x92)
Reserved
(0x91)
Reserved
(0x90)
Reserved
(0x8F)
Reserved
(0x8E)
Reserved
(0x8D) Reserved
(0x8C) Reserved
(0x8B)
OCR1BH OCR1B15 OCR1B14 OCR1B13 OCR1B12 OCR1B11 OCR1B10 OCR1B9 OCR1B8
145
(0x8A) OCR1BL OCR1B7 OCR1B6 OCR1B5 OCR1B4 OCR1B3 OCR1B2 OCR1B1 OCR1B0
145
(0x89)
OCR1AH OCR1A15 OCR1A14 OCR1A13 OCR1A12 OCR1A11 OCR1A10 OCR1A9 OCR1A8
145
(0x88)
OCR1AL OCR1A7 OCR1A6 OCR1A5 OCR1A4 OCR1A3 OCR1A2 OCR1A1 OCR1A0
145
(0x87)
ICR1H ICR115 ICR114 ICR113 ICR112 ICR111 ICR110
ICR19
ICR18
145
(0x86)
ICR1L
ICR17
ICR16
ICR15
ICR14
ICR13
ICR12
ICR11
ICR10
145
(0x85)
TCNT1H TCNT115 TCNT114 TCNT113 TCNT112 TCNT111 TCNT110 TCNT19 TCNT18
144
(0x84)
TCNT1L TCNT17 TCNT16 TCNT15 TCNT14 TCNT13 TCNT12 TCNT11 TCNT10
144
(0x83)
TCCR1D OC1BX OC1BW OC1BV OC1BU OC1AX OC1AW OC1AV
OC1AU
144
(0x82)
TCCR1C FOC1A FOC1B
–
–
–
–
–
–
144
(0x81)
TCCR1B ICNC1
ICES1
–
WGM13 WGM12
CS12
CS11
CS10
143
(0x80)
TCCR1A COM1A1 COM1A0 COM1B1 COM1B0
–
–
WGM11 WGM10
141
(0x7F)
DIDR1
–
–
–
–
–
ADC10D ADC9D
ADC8D
207
Notes: 1. Address bits exceeding EEAMSB (Table 4-74 on page 225) are don’t care.
2. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory
addresses should never be written.
3. I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
4. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVR^®s, the CBI and
SBI instructions will only operate on the specified bit, and can therefore be used on registers containing such status
flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
5. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel^®
ATtiny87/167 is a complex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 - 0xFF in SRAM, only the
ST/STS/STD and LD/LDS/LDD instructions can be used.
ATA6616C/ATA6617C [DATASHEET] 259
9132I–AUTO–06/14