AT89SND2CMP3B_14 Datasheet, PDF (22/242 Pages) ATMEL Corporation – Stand-alone MP3 Decoder

6.6
6.7
Registers
Table 6-2. AUXR1 Register
AUXR1 (S:A2h) – Auxiliary Register 1
7
6
5
4
3
2
-
-
ENBOOT
-
GF3
0
1
0
-
DPS
Bit
Bit Number Mnemonic Description
7-6
-
Reserved
The value read from these bits are indeterminate. Do not set these bits.
Enable Boot Flash
5
ENBOOT¹
Set this bit to map the boot Flash in the code space between at addresses F000h to
FFFFh.
Clear this bit to disable boot Flash.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
GF3
General Flag
This bit is a general-purpose user flag.
2
0
Always Zero
This bit is stuck to logic 0 to allow INC AUXR1 instruction without affecting GF3 flag.
1
-
Reserved for Data Pointer Extension.
Data Pointer Select Bit
0
DPS
Set to select second data pointer: DPTR1.
Clear to select first data pointer: DPTR0.
Reset Value = XXXX 00X0b
Note: 1. ENBOOT bit is only available in AT89C51SND2C product.
Hardware Bytes
Table 6-3.
7
X2B
HSB Byte – Hardware Security Byte
6
5
4
3
BLJB
-
-
-
2
1
0
LB2
LB1
LB0
Bit
Bit Number Mnemonic Description
X2 Bit
7
X2B⁽¹⁾ Program this bit to start in X2 mode.
Unprogram (erase) this bit to start in standard mode.
Boot Loader Jump Bit
6
BLJB⁽²⁾ Program this bit to execute the boot loader at address F000h on next reset.
Unprogram (erase) this bit to execute user’s application at address 0000h on next reset.
5-4
-
Reserved
The value read from these bits is always unprogrammed. Do not program these bits.
Reserved
3
-
The value read from this bit is always unprogrammed. Do not program this bit.
2-0
LB2:0
Hardware Lock Bits
Refer to for bits description.
22 AT8xC51SND2C/MP3B
4341H–MP3–10/07