AT89SND2CMP3B_14 Datasheet, PDF (219/242 Pages) ATMEL Corporation – Stand-alone MP3 Decoder

AT8xC51SND2C/MP3B
24.3 AC Characteristics
24.3.1 External Program Bus Cycles
24.3.1.1
Definition of Symbols
Table 24-9. External Program Bus Cycles Timing Symbol Definitions
Signals
Conditions
A
Address
H
High
I
Instruction In
L
Low
L
ALE
V
Valid
P
PSEN
X
No Longer Valid
Z
Floating
24.3.1.2
Timings
Test conditions: capacitive load on all pins= 50 pF.
Table 24-10. External Program Bus Cycle - Read AC Timings
V_DD = 2.7 to 3.3 V, T_A = -40 to +85°C
Variable Clock
Standard Mode
Symbol
Parameter
Min
Max
T_CLCL
T_LHLL
T_AVLL
T_LLAX
T_LLIV
T_PLPH
T_PLIV
T_PXIX
T_PXIZ
T_AVIV
T_PLAZ
Clock Period
ALE Pulse Width
Address Valid to ALE Low
Address hold after ALE Low
ALE Low to Valid Instruction
PSEN Pulse Width
PSEN Low to Valid Instruction
Instruction Hold After PSEN High
Instruction Float After PSEN High
Address Valid to Valid Instruction
PSEN Low to Address Float
50
2·T_CLCL-15
T_CLCL-20
T_CLCL-20
4·T_CLCL-35
3·T_CLCL-25
0
3·T_CLCL-35
T_CLCL-10
5·T_CLCL-35
10
Variable Clock
X2 Mode
Min
Max
Unit
50
ns
T_CLCL-15
ns
0.5·T_CLCL-20
ns
0.5·T_CLCL-20
ns
2·T_CLCL-35
ns
1.5·T_CLCL-25
ns
1.5·T_CLCL-35 ns
0
ns
0.5·T_CLCL-10 ns
2.5·T_CLCL-35 ns
10
ns
4341H–MP3–10/07
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