AT89SND2CMP3B_14 Datasheet, PDF (162/242 Pages) ATMEL Corporation – Stand-alone MP3 Decoder

Figure 19-9. Master SPI Polling Flows
SPI Initialization
Polling Policy
Disable interrupt
SPIE = 0
Select Master Mode
MSTR = 1
Select Bit Rate
program SPR2:0
Select Format
program CPOL & CPHA
Enable SPI
SPEN = 1
SPI Transfer
Polling Policy
Select Slave
Pn.x = L
Start Transfer
write data in SPDAT
End Of Transfer?
SPIF = 1?
Get Data Received
read SPDAT
Last Transfer?
Deselect Slave
Pn.x = H
19.3.5
Master Mode with Interrupt
Figure 19-10 shows the initialization phase and the transfer phase flows using the interrupt.
Using this flow prevents any overrun error occurrence.
The bit rate is selected according to Table 19-1.
The transfer format depends on the slave peripheral.
SS may be deasserted between transfers depending also on the slave peripheral.
Reading SPSTA at the beginning of the ISR is mandatory for clearing the SPIF flag. Clear is
effective when reading SPDAT.
162 AT8xC51SND2C/MP3B
4341H–MP3–10/07