ATMEGA32_14 Datasheet, PDF (214/346 Pages) ATMEL Corporation – High Endurance Non-volatile Memory segments

ATmega32(L)
ADC Multiplexer
Selection Register –
ADMUX
Table 82. Correlation between Input Voltage and Output Codes
V_ADCn
V_ADCm + V_REF/GAIN
V_ADCm + 511/512 V_REF/GAIN
V_ADCm + 510/512 V_REF/GAIN
...
Read code
0x1FF
0x1FF
0x1FE
...
Corresponding Decimal Value
511
511
510
...
V_ADCm + 1/512 V_REF/GAIN
0x001
1
V_ADCm
0x000
0
V_ADCm - 1/512 V_REF/GAIN
0x3FF
-1
...
...
...
V_ADCm - 511/512 V_REF/GAIN
V_ADCm - V_REF/GAIN
0x201
0x200
-511
-512
Example:
ADMUX = 0xED (ADC3 - ADC2, 10x gain, 2.56V reference, left adjusted result)
Voltage on ADC3 is 300 mV, voltage on ADC2 is 500 mV.
ADCR = 512 × 10 × (300 - 500) / 2560 = -400 = 0x270
ADCL will thus read 0x00, and ADCH will read 0x9C. Writing zero to ADLAR right adjusts
the result: ADCL = 0x70, ADCH = 0x02.
Bit
Read/Write
Initial Value
7
REFS1
R/W
0
6
REFS0
R/W
0
5
ADLAR
R/W
0
4
MUX4
R/W
0
3
MUX3
R/W
0
2
MUX2
R/W
0
1
MUX1
R/W
0
0
MUX0
R/W
0
ADMUX
• Bit 7:6 – REFS1:0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in Table 83. If these bits are
changed during a conversion, the change will not go in effect until this conversion is complete
(ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external
reference voltage is being applied to the AREF pin.
Table 83. Voltage Reference Selections for ADC
REFS1 REFS0 Voltage Reference Selection
0
0
AREF, Internal Vref turned off
0
1
AVCC with external capacitor at AREF pin
1
0
Reserved
1
1
Internal 2.56V Voltage Reference with external capacitor at AREF pin
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
2503Q–AVR–02/11
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