ATMEGA32_14 Datasheet, PDF (114/346 Pages) ATMEL Corporation – High Endurance Non-volatile Memory segments

ATmega32(L)
8-bit
Timer/Counter2
with PWM and
Asynchronous
Operation
Timer/Counter2 is a general purpose, single compare unit, 8-bit Timer/Counter module. The
main features are:
• Single Compare unit Counter
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Frequency Generator
• 10-bit Clock Prescaler
• Overflow and Compare Match Interrupt Sources (TOV2 and OCF2)
• Allows clocking from External 32kHz Watch Crystal Independent of the I/O Clock
Overview
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 53. For the actual place-
ment of I/O pins, refer to “Pinout ATmega32” on page 2. CPU accessible I/O Registers, including
I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are
listed in the “8-bit Timer/Counter Register Description” on page 125.
Figure 53. 8-bit Timer/Counter Block Diagram
TCCRn
count
clear
direction
Control Logic
BOTTOM
TOP
Timer/Counter
TCNTn
= 0 = 0xFF
=
clk_Tn
Prescaler
OCn
(Int.Req.)
Waveform
Generation
TOVn
(Int.Req.)
T/C
Oscillator
TOSC1
TOSC2
clk_I/O
OCn
OCRn
Status flags
Synchronized Status flags
Synchronization Unit
ASSRn
asynchronous mode
select (ASn)
clk_I/O
clk_ASY
Registers
The Timer/Counter (TCNT2) and Output Compare Register (OCR2) are 8-bit registers. Interrupt
request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register (TIFR).
All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and
TIMSK are not shown in the figure since these registers are shared by other timer units.
The Timer/Counter can be clocked internally, via the prescaler, or asynchronously clocked from
the TOSC1/2 pins, as detailed later in this section. The asynchronous operation is controlled by
the Asynchronous Status Register (ASSR). The Clock Select logic block controls which clock
source the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inac-
tive when no clock source is selected. The output from the Clock Select logic is referred to as the
timer clock (clk_T2).
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