ATA6616 Datasheet, PDF (143/308 Pages) ATMEL Corporation – Single-package High Performance, Low Power AVR 8-bit Microcontroller with LIN

9132D–AUTO–12/10
Atmel ATA6616/ATA6617
Figure 4-47. Output Compare Unit, Block Diagram
DATA BUS (8-bit)
TEMP (8-bit)
OCRnxH Buf.(8-bit) OCRnxL Buf.(8-bit)
OCRnx Buffer (16-bit Register)
TCNTnH (8-bit)
TCNTnL (8-bit)
TCNTn (16-bit Counter)
OCRnxH (8-bit)
OCRnxL (8-bit)
OCRnx (16-bit Register)
TOP
BOTTOM
= (16-bit Comparator )
OCFnx
(Int.Req.)
Waveform Generator
WGMn3:0 COMnx1:0
OCnxU
OCnxV
OCnxW
OCnxX
The OCR1A/B Register is double buffered when using any of the twelve Pulse Width Modula-
tion (PWM) modes. For the Normal and Clear Timer on Compare (CTC) modes of operation,
the double buffering is disabled. The double buffering synchronizes the update of the
OCR1A/B Compare Register to either TOP or BOTTOM of the counting sequence. The syn-
chronization prevents the occurrence of odd-length, non-symmetrical PWM pulses, thereby
making the output glitch-free.
The OCR1A/B Register access may seem complex, but this is not case. When the double
buffering is enabled, the CPU has access to the OCR1A/B Buffer Register, and if double buff-
ering is disabled the CPU will access the OCR1A/B directly. The content of the OCR1A/B
(Buffer or Compare) Register is only changed by a write operation (the Timer/Counter does
not update this register automatically as the TCNT1 and ICR1 Register). Therefore OCR1A/B
is not read via the high byte temporary register (TEMP). However, it is a good practice to read
the low byte first as when accessing other 16-bit registers. Writing the OCR1A/B Registers
must be done via the TEMP Register since the compare of all 16 bits is done continuously.
The high byte (OCR1A/BH) has to be written first. When the high byte I/O location is written by
the CPU, the TEMP Register will be updated by the value written. Then when the low byte
(OCR1A/BL) is written to the lower eight bits, the high byte will be copied into the upper 8-bits
of either the OCR1A/B buffer or OCR1A/B Compare Register in the same system clock cycle.
For more information of how to access the 16-bit registers refer to “Accessing 16-bit Registers”
on page 136.
143