ATR2406_06 Datasheet, PDF (13/25 Pages) ATMEL Corporation – Low-IF 2.4-GHz ISM Transceiver

ATR2406
7.7 Control Signals
The various transceiver functions are activated by the following control signals. A timing pro-
posal is shown in Figure 7-3 on page 14
Table 7-7. Control Signals and Functions
Signal
PU_REG
PU_TRX
RX_ON
TX_ON
nOLE
Functions
Activates AUX voltage regulator and the VCO voltage regulator supplying the
complete transceiver
Activates RX/TX blocks
Activates RX circuits: DEMOD, IF AMP, IR MIXER
Activates TX circuits: PA, RAMP GEN, Starts RAMP SIGNAL at RAMP_OUT
Disables open loop mode of the PLL
7.8 Serial Programming Bus
The transceiver is programmed by the SPI (CLOCK, DATA and ENABLE).
After setting the enable signal to low, the data is transferred bit by bit into the shift register on
the rising edge of the clock signal, starting with the MSBit. When the enable signal has
returned to high, the programmed information is active. Additional leading bits are ignored and
there is no check made of how many clock pulses arrived during enable low.
The programming of the transceiver is done by a 16-bit or 25-bit data word (for the RX clock
recovery mode).
7.9 3-wire Bus Timing
Figure 7-2. 3-wire Bus Protocol Timing Diagram
DATA
CLOCK
ENABLE
TL
TPER
TC
TS
TH
TEC
TT
Table 7-8. 3-wire Bus Protocol Table
Description
Clock period
Set time data to clock
Hold time data to clock
Clock pulse width
Set time enable to clock
Hold time enable to data
Time between two protocols
Symbol
Minimum Value
Unit
TPER
100
ns
TS
20
ns
TH
20
ns
TC
60
ns
TL
100
ns
TEC
0
ns
TT
250
ns
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4779L–ISM–09/06