ATTINY20_13 Datasheet, PDF (114/220 Pages) ATMEL Corporation – 8-bit AVR Microcntroller with 2K Bytes In-System Programmable Flash

Figure 15-6. ADC Timing Diagram, Auto Triggered Conversion
One Conversion
Next Conversion
Cycle Number
1
2
3
4
5
6
7
8
9
10 11 12 13
1
2
ADC Clock
Trigger
Source
ADATE
ADIF
ADCH
Sign and MSB of Result
ADCL
LSB of Result
Prescaler
Reset
MUX and REFS
Update
Sample &
Hold
Conversion
Complete
Prescaler
Reset
In Free Running mode, a new conversion will be started immediately after the conversion completes, while ADSC
remains high. See Figure 15-7.
Figure 15-7. ADC Timing Diagram, Free Running Conversion
One Conversion
Next Conversion
Cycle Number ^{12 13 14 1}
2
3
4
ADC Clock
ADSC
ADIF
ADCH
Sign and MSB of Result
ADCL
LSB of Result
Conversion
Complete
For a summary of conversion times, see Table 15-1.
Sample & Hold
MUX and REFS
Update
ATtiny20 [DATASHEET]
8235E–AVR–03/2013
114