AT91SAM7A2_04 Datasheet, PDF (101/369 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers

GIC Source Vector Register
Name:
GIC_SVR0...GIC_SVR31
Access:
Read/Write
Base Address: 0x080...0x0FC
31
30
29
28
27
VECT[31:24]
23
22
21
20
19
VECT[23:16]
15
14
13
12
11
VECT[15:8]
7
6
5
4
3
VECT[7:0]
• VECT[31:0]: Interrupt Handler Address
Address of the corresponding handler for each interrupt source.
AT91SAM7A2
26
25
24
18
17
16
10
9
8
2
1
0
GIC Interrupt Vector Register
Name:
GIC_IVR
Access:
Read-only
Base Address: 0x100
31
30
29
28
27
26
25
24
IRQV[31:24]
23
22
21
20
19
18
17
16
IRQV[23:16]
15
14
13
12
11
10
9
8
IRQV[15:8]
7
6
5
4
3
2
1
0
IRQV[7:0]
• IRQV[31:0]: Interrupt Vector Address
Address of the currently serviced interrupt vector (user programmed in the GIC_SVR register).
Note: GIC_IVR = 0x00000000 when there is no current interrupt.
Note: When debugging, to read the GIC_IVR register clears the IRQ interrupt if present at the GIC. To avoid this behavior, users
should use ghost registers (see “Ghost Registers” on page 7).
6021A–ATARM–07/04
PRELIMINARY
101