AP89341_15 Datasheet, PDF (17/24 Pages) Aplus Intergrated Circuits – Integrated Circuits Inc

Integrated Circuits Inc. aP89341/170/085
AC CHARACTERISTICS ( T_A = 0 to 70℃, V_DD = 3.3V, V_SS = 0V, 8KHz sampling )
Symbol Parameter
Min. Typ. Max.
Unit
Note
tKD
Key trigger debounce time (long)
16


ms
1,2
tKD
Key trigger debounce time (long) –
retrigger option
24


ms
1,2
tKD
Key trigger debounce time (short)
65


µs
1,2
tKD
Key trigger debounce time (short) –
retrigger option
200


µs
1,2
tKDD
Key trigger delay after ramp down 256/Fs  
s
4
tSTPD
STOP pulse output delay time

 256
µs
tSTPW
STOP pulse width

64

ms
1
tBD
BUSY signal output delay time

 100
ns
tBH
BUSY signal output hold time
 100 
ns
tAS
Address set-up time
100


ns
tAH
Address hold time
100


ns
tSBTW
SBT stroke pulse width (long)
16


ms
1,2
tSBTW
SBT stroke pulse width (short)
65


µs
1,2
tCS
Chip select set-up time
100


ns
tCH
Chip select hold time
100


ns
tDS
Data-in set-up time
100


ns
tDH
Data-in hold time
100


ns
tSCKW
Serial clock pulse width
1


µs
tSCKC
Serial clock cycle time
2


µs
tCOUTD COUT output delay time

 256
µs
tFD
FULL signal output delay time
 100 
ns
tLEDC
LED flash frequency

3

Hz
3
Notes :
1. This parameter is inversely proportional to the sampling frequency.
2. The long or short debounce time is selectable as whole chip option during Voice Files Compiling.
3. This parameter is proportional to the sampling frequency.
4. Fs is sampling frequency in Hz
Ver 5.0
16
Aug 23, 2010