ARA2004_11 Datasheet, PDF (3/21 Pages) ANADIGICS, Inc – Address-Programmable Reverse Amplifier with Step Attenuator

ARA2004
pin nAMe
Table 1: Pin Description
DescRiption
pin nAMe
DescRiption
1
GND Ground
15
N/C
No Connection ⁽¹⁾
2
VATTN Supply Attenuator
16
N/C
No Connection ⁽¹⁾
3 ATTIN (+) Attenuator (+) Input ⁽²⁾
17
N/C
No Connection ⁽¹⁾
4 A1Out (+) Amplifier A1 (+) Output
18 GNDCMOS Ground for Digital CMOS Circuit
5
A1IN (+) Amplifier A1 (+) Input ⁽²⁾
19 ATTOUT (-) Attenuator (-) Output ⁽²⁾
6
Vg1 Amplifier A1 (+/-) Control
20 A2IN (-) Amplifier A2 (-) Input ⁽²⁾
7
ISET1
Amplifier A1 (+/-) Current Adjust
21 A2OUT (-) Amplifier A2 (-) Output
8
A1IN (-) Amplifier A1 (-) Input ⁽²⁾
22
ISET2
Amplifier A2 (+/-) Current Adjust
9 A1OUT (-) Amplifier A1 (-) Output
23
Vg2 Amplifier A2 (+/-) Control
10 ATTIN (-) Attenuator (-) Input ⁽²⁾
24 A2OUT (+) Amplfiier A2 (+) Output
11
VCMOS Supply For Digital CMOS Circuit 25 A2IN (+) Amplifier A2 (+) Input ⁽²⁾
12
CLK Clock
26 ATTOUT (+) Attenuator (+) Output ⁽²⁾
13
DAT Data
27
N/C
No Connection ⁽¹⁾
14
EN
Enable
28
GND
Notes:
(1) All N/C pins should be grounded.
(2) Pins should be AC-coupled. No external DC bias should be applied.
Ground
Data Sheet- Rev 2.2
3
04/2011