ARA2004_11 Datasheet, PDF (1/21 Pages) ANADIGICS, Inc – Address-Programmable Reverse Amplifier with Step Attenuator

features
• Low cost integrated amplifier with Step
Attenuator
• Attenuation Range: 0 - 59 dB, adjustable in
1 dB increments via a 3-wire Serial Control
• Meets DOCSIS distortion requirements at a +60
dBmV output signal level
• Low distortion and low noise
• Frequency range: 5 - 100 MHz
• 5 Volt Operation
• -40 to +85 8C temperature range
• RoHS Compliant Package Option
ARA2004
Address-Programmable Reverse
Amplifier with Step Attenuator
Data Sheet - rev 2.2
Applications
• MCNS/DOCSIS Compliant Cable Modems
• CATV Interactive Set-Top Box
• Telephony over Cable Systems
• OpenCable Set-Top Box
• Residential Gateway
PRODUCT DESCRIPTION
The ARA2004 is designed to provide the reverse path
amplification and output level control functions in a
CATV Set-Top Box or Cable Modem. It incorporates
a digitally controlled precision step attenuator that is
preceded by an ultra low noise amplifier stage, and
followed by an ultra-linear output driver amplifier. This
device uses a balanced circuit design that exceeds the
MCNS/DOCSIS requirement for harmonic performance
Clock
Data
Enable
S12 Package
28-Pin SSOP
with Heat Slug
at a +60 dBmV output level while only requiring a single
polarity +5 V supply. Both the input and output are
matched to 75 ohms with an appropriate transformer.
The precision attenuator provides up to 58 dB of
attenuation in 1 dB increments via a three-wire serial
interface. With external passive components, this
device meets IEC 1000-4-12 and ANSI/IEEE C62.41-
1991 100KHz ringwave tests, as well as IEC1000-4-5
1.2/50 µS surge tests. The ARA2004 is offered in a
28-pin SSOP package featuring a heat slug on the
bottom of the package.
Balun
ARA2000
Low Pass
Filter
Upstream
QPSK/16QAM
Modulator
5-42 MHz
Transmit Enable/Disable
2
Address Control
Clock
Data
MAC
Diplexer
54-860 MHz
Double-
Conversion
Tuner
44 MHz
SAW
Filter
Clock
Data
QAM Receiver
with FEC
RAM ROM
Microcontroller
with Ethernet
MAC
10Base-T
Transceiver
RJ45
Connector
Figure 1: Functional Block Diagram for DOCSIS 3.0 Application
04/2011