TCS3472_17 Datasheet, PDF (25/40 Pages) ams AG – Red, Green, Blue (RGB), and Clear Light

TCS3472 − Register Description
Field
APERS
Bits
3:0
Description
Interrupt persistence. Controls rate of interrupt to the host processor.
FIELD VALUE MEANING
INTERRUPT PERSISTENCE FUNCTION
0000
Every
Every RGBC cycle generates an interrupt
0001
1
1 clear channel value outside of threshold range
0010
0011
0100
2
2 clear channel consecutive values out of range
3
3 clear channel consecutive values out of range
5
5 clear channel consecutive values out of range
0101
10
10 clear channel consecutive values out of range
0110
15
15 clear channel consecutive values out of range
0111
20
20 clear channel consecutive values out of range
1000
1001
1010
25
25 clear channel consecutive values out of range
30
30 clear channel consecutive values out of range
35
35 clear channel consecutive values out of range
1011
40
40 clear channel consecutive values out of range
1100
45
45 clear channel consecutive values out of range
1101
50
50 clear channel consecutive values out of range
1110
1111
55
55 clear channel consecutive values out of range
60
60 clear channel consecutive values out of range
Figure 31:
Configuration Register
7
6
Configuration Register (0x0D)
The configuration register sets the wait long time.
5
4
3
2
1
0
Reserved
WLONG Reserved
Fields
Reserved
WLONG
Reserved
Bits
7:2
1
0
Description
Reserved. Write as 0.
Wait Long. When asserted, the wait cycles are increased by a factor 12× from
that programmed in the WTIME register.
Reserved. Write as 0.
ams Datasheet
[v1-02] 2016-Feb-08
Page 25
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