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TCS3472_17 Datasheet, PDF (24/40 Pages) ams AG – Red, Green, Blue (RGB), and Clear Light
TCS3472 − Register Description
Figure 29:
RGBC Interrupt Threshold Registers
RGBC Interrupt Threshold Registers
(0x04 − 0x07)
The RGBC interrupt threshold registers provides the values to
be used as the high and low trigger points for the comparison
function for interrupt generation. If the value generated by the
clear channel crosses below the lower threshold specified, or
above the higher threshold, an interrupt is asserted on the
interrupt pin.
Register
AILTL
AILTH
AIHTL
AIHTH
Address
0x04
0x05
0x06
0x07
Bits
7:0
7:0
7:0
7:0
Description
RGBC clear channel low threshold lower byte
RGBC clear channel low threshold upper byte
RGBC clear channel high threshold lower byte
RGBC clear channel high threshold upper byte
Figure 30:
Persistence Register
7
6
5
Reserved
Persistence Register (0x0C)
The persistence register controls the filtering interrupt
capabilities of the device. Configurable filtering is provided to
allow interrupts to be generated after each integration cycle or
if the integration has produced a result that is outside of the
values specified by the threshold register for some specified
amount of time.
4
3
2
1
0
APERS
Field
PPERS
Bits
7:4
Reserved
Description
Page 24
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[v1-02] 2016-Feb-08