TCS3472_17 Datasheet, PDF (19/40 Pages) ams AG – Red, Green, Blue (RGB), and Clear Light

TCS3472 − I²C Protocol
I²C Protocol
Figure 23:
I²C Protocols
Interface and control are accomplished through an I²C serial
compatible interface (standard or fast mode) to a set of registers
that provide access to device control functions and output data.
The devices support the 7-bit I²C addressing protocol.
The I²C standard provides for three types of bus transaction:
read, write, and a combined protocol (Figure 23). During a write
operation, the first byte written is a command byte followed by
data. In a combined protocol, the first byte written is the
command byte followed by reading a series of bytes. If a read
command is issued, the register address from the previous
command will be used for data access. Likewise, if the MSB of
the command is not set, the device will write a series of bytes
at the address stored in the last valid command with a register
address. The command byte contains either control information
or a 5-bit register address. The control commands can also be
used to clear interrupts.
The I²C bus protocol was developed by Philips (now NXP). For
a complete description of the I²C protocol, please review the
NXP I²C design specification at www.i2c-bus.org/references/.
A Acknowledge (0)
N Not Acknowledged (1)
P Stop Condition
R Read (1)
S Start Condition
Sr Repeated Start Condition
W Write (0)
Continuation of Protocol
Master - to - Slave
Slave - to - Master
ams Datasheet
[v1-02] 2016-Feb-08
Page 19
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