ELANSC520 Datasheet, PDF (331/440 Pages) Advanced Micro Devices – Microcontroller

Watchdog Timer Registers
Bit Name
Function
7-0 EXP_SEL[7–0] Exponent Select
This bit field determines the duration of the watchdog timer time-out interval. Table 16-2
shows the values for the EXP_SEL field. The bit values shown in the table are programmed to
select a time-out exponent as shown in the “Exponent” column.
The selected exponent determines the time-out duration according to the following equation:
Time-out duration = 2^exponent / CPU Frequency
where
Time-out duration is the time-out period in seconds
exponent is the value selected from Table 16-2
CPU Frequency is the operating speed of the CPU in Hz.
When multiple bits are set in the EXP_SEL field, the least significant bit set is used to select
the exponent.
Table 16-2 Watchdog Timer Exponent Selections
Bits
7 6543210
0 0000000
X XXXXXX 1
X XXXXX 1 0
X XXXX1 0 0
X XXX10 0 0
X XX1 00 0 0
X X1 0 00 0 0
X 1000000
1 0000000
Exponent
N/A
14
24
25
26
27
28
29
30
Time-Out
Interval
33.000 MHz
Infinity
496 ms
508 ms
1.02 s
2.03 s
4.07 s
8.13 s
16.27 s
32.54 s
Time-Out
Interval
33.333 MHz
Infinity
492 ms
503 ms
1.01 s
2.01 s
4.03 s
8.05 s
16.11 s
32.21 s
For example, to program a maximum time-out of about 32 seconds, the EXP_SEL field is set
to 80h. The time-out value can then be calculated as follows for the ÉlanSC520
microcontroller with a 33.000 MHz CPU clock.
Time-out interval = 2³⁰ / (33.000 MHz crystal frequency)
= 2³⁰ / (33,000,000)
= 32.54 seconds.
Programming Notes
The watchdog timer can only be programmed after special keyed sequences are written to this address. Two special
keyed sequences are recognized:
s The key sequence of 3333h followed by CCCCh is called the write key and is used to open this Watchdog Timer
Control (WDTMRCTL) register for a single write.
s The key sequence of AAAAh followed by 5555h is called the clear-count key and is used to clear the current
watchdog timer counter.
Note: All keys are written to the WDTMRCTL register address (MMCR offset CB0h).
Normally this register is read-only. The write key sequence must be written before a value can be programmed into
this register; after this single value is written, the write key sequence must be applied again before another value
can be programmed.
The ENB bit must be 0 before the WRST_ENB bit or the EXP_SEL bit field can be written.
When the microcontroller is in AMDebug™ technology mode, the WDTMRCTL register can still be accessed in the
normal manner. However, the AMDebug technology stops the count registers from incrementing further to prevent
the watchdog timer from causing an interrupt or reset in AMDebug technology mode.
Élan™SC520 Microcontroller Register Set Manual
16-3