PC28F512G18FF Datasheet, PDF (97/118 Pages) Micron Technology – 128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory

128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory
Flowcharts
Bus
Operation
WRITE
WRITE
WRITE^{2, 3}
WRITE^{4, 5}
READ
Command
BUFFERED
PROGRAM
SETUP
BUFFERED
PROGRAM
LOAD 1
BUFFERED
PROGRAM
LOAD 2
BUFFERED
PROGRAM
CONFIRM
None
Comments
Data = 0xE9
Addr = Colony base address
Data = word count -1¹
Address = Block address
Data = Data to be programmed
Address = Word address
Data = 0xD0
Address = Address within block
Status register Data
Address = Block address
Notes:
1. D[8:0] is loaded as word count-1.
2. Repeat BUFFERED PROGRAM LOAD 2 until the word count is achieved. (Load up to 512
words.)
3. The command sequence aborts if the address of the BUFFERED PROGRAM LOAD 2 cycle
is in a different block from the address of the BUFFERED PROGRAM SETUP cycle.
4. The command sequence aborts if the address of the BUFFERED PROGRAM CONFIRM cy-
cle is in a different block from the address of the BUFFERED PROGRAM SETUP cycle. Al-
so, an abort will occur if the data of the BUFFERED PROGRAM CONFIRM cycle data is not
0xD0.
5. The read mode changes to status read on the BUFFERED PROGRAM CONFIRM command.
PDF: 09005aef8448483a
128_256_512_65nm_g18.pdf - Rev. F 8/11 EN
97
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