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EP2C5F256I8N Datasheet, PDF (4/168 Pages) Altera Corporation – Section I. Cyclone II Device Family Data Sheet | |||
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Features
Features
â DSP intellectual property (IP) cores
â DSP Builder interface to The Mathworks Simulink and Matlab
design environment
â DSP Development Kit, Cyclone II Edition
Cyclone II devices include a powerful FPGA feature set optimized for
low-cost applications including a wide range of density, memory,
embedded multiplier, and packaging options. Cyclone II devices support
a wide range of common external memory interfaces and I/O protocols
required in low-cost applications. Parameterizable IP cores from Altera
and partners make using Cyclone II interfaces and protocols fast and easy.
The Cyclone II device family offers the following features:
â High-density architecture with 4,608 to 68,416 LEs
â M4K embedded memory blocks
â Up to 1.1 Mbits of RAM available without reducing available
logic
â 4,096 memory bits per block (4,608 bits per block including 512
parity bits)
â Variable port configurations of Ã1, Ã2, Ã4, Ã8, Ã9, Ã16, Ã18, Ã32,
and Ã36
â True dual-port (one read and one write, two reads, or two
writes) operation for Ã1, Ã2, Ã4, Ã8, Ã9, Ã16, and Ã18 modes
â Byte enables for data input masking during writes
â Up to 260-MHz operation
â Embedded multipliers
â Up to 150 18- Ã 18-bit multipliers are each configurable as two
independent 9- Ã 9-bit multipliers with up to 250-MHz
performance
â Optional input and output registers
â Advanced I/O support
â High-speed differential I/O standard support, including LVDS,
RSDS, mini-LVDS, LVPECL, differential HSTL, and differential
SSTL
â Single-ended I/O standard support, including 2.5-V and 1.8-V,
SSTL class I and II, 1.8-V and 1.5-V HSTL class I and II, 3.3-V PCI
and PCI-X 1.0, 3.3-, 2.5-, 1.8-, and 1.5-V LVCMOS, and 3.3-, 2.5-,
and 1.8-V LVTTL
â Peripheral Component Interconnect Special Interest Group (PCI
SIG) PCI Local Bus Specification, Revision 3.0 compliance for 3.3-V
operation at 33 or 66 MHz for 32- or 64-bit interfaces
â PCI Express with an external TI PHY and an Altera PCI Express
Ã1 Megacore® function
1â2
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2008
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