ER3105DI Datasheet, PDF (19/25 Pages) Altera Corporation – 500mA Wide VIN Synchronous Buck Regulator

Page 19
Should the output fault persist, the regulator will repeat the hiccup sequence indefinitely. There is no danger even if the output is
shorted during soft-start.
If V_OUT is shorted very quickly, FB may collapse below 5/8^ths of its target value before 17 cycles of overcurrent are detected. The
ER3105DI recognizes this condition and will begin to lower its switching frequency proportional to the FB pin voltage. This
insures that under no circumstance (even with V_OUT near 0V) will the inductor current run away.
Negative Current Limit
Should an external source somehow drive current into V_OUT, the controller will attempt to regulate V_OUT by reversing its inductor
current to absorb the externally sourced current. In the event that the external source is low impedance, current may be reversed to
unacceptable levels and the controller will initiate its negative current limit protection. Similar to normal overcurrent, the negative
current protection is realized by monitoring the current through the lower FET. When the valley point of the inductor current reaches
negative current limit, the lower FET is turned off and the upper FET is forced on until current reaches the POSITIVE current limit or
an internal clock signal is issued. At this point, the lower FET is allowed to operate. Should the current again be pulled to the negative
limit on the next cycle, the upper FET will again be forced on and current will be forced to 1/6^th of the positive current limit. At this
point the controller will turn off both FET’s and wait for COMP to indicate return to normal operation. During this time, the controller
will apply a 100 load from SW to PGND and attempt to discharge the output. Negative current limit is a pulse-by-pulse style
operation and recovery is automatic. Negative current limit protection is disabled in PFM operating mode because reverse current is
not allowed to build due to the diode emulation behavior of the lower FET.
Over-Temperature Protection
Over-temperature protection limits maximum junction temperature in the ER3105DI. When junction temperature (T_J) exceeds
+150°C, both FET’s are turned off and the controller waits for temperature to decrease by approximately 20°C. During this time
POK is pulled low. When temperature is within an acceptable range, the controller will initiate a normal soft-start sequence. For
continuous operation, the +125°C junction temperature rating should not be exceeded.
Boot Undervoltage Protection
If the Boot capacitor voltage falls below 1.8V, the Boot undervoltage protection circuit will turn on the lower FET for 400ns to
recharge the capacitor. This operation may arise during long periods of no switching such as PFM no load situations. In PWM
operation near dropout (V_IN near V_OUT), the regulator may hold the upper FET on for multiple clock cycles. To prevent the boot
capacitor from discharging, the lower FET is forced on for approximately 200ns every 10 clock cycles.
Application Guidelines
Simplifying the Design
While the ER3105DI offers user programmed options for most parameters, the easiest implementation with fewest components
involves selecting internal settings for SS, COMP and FSW. Table 1 on page 4 provides component value selections for a variety
of output voltages and will allow the designer to implement solutions with a minimum of effort.
Operating Frequency
The ER3105DI operates at a default switching frequency of 500kHz if F_SW is tied to AVINO. Tie a resistor from F_SW to GND to
program the switching frequency from 300kHz to 2MHz, as shown in Equation 4.
R_FSWk = 108.75kt – 0.2s   1s
(EQ. 4)
Where:
t is the switching period in µs.
March 2014 Altera Corporation
09616
ER3105DI 500mA Wide VIN Synchronous Buck Regulator
March 14, 2014
Rev A