AK2346A Datasheet, PDF (9/37 Pages) Asahi Kasei Microsystems – Two-way Radio Audio Processor

ASAHI KASEI
[AK2346A]
10. Clock Input Characteristics
Parameter
Clock frequency
Symbol Condition
Min.
MCK0 XIN,XOUT
MCK1 XIN
High level input voltage V_{MCK1_IH} XIN
1.5
Low level input voltage V_{MCK1_IL} XIN
Input amplitude
V_MCK2
XIN
0.2
Typ.
14.7456
3.6864
7.3728
11.0592
14.7456
Max.
0.4
1.0
Unit
MHz
Remarks
MHz
*1), *2)
V
*1)
V
*1)
V_PP
*2)
*1) These values apply when the clock signal is input on the XIN pin directly. For details, refer to 6),
"Oscillator circuit", in "Recommended External Circuit Examples".
*2) These values apply when the clock signal is input on the XIN pin via DC cut. For details, refer
to 6), "Oscillator circuit", in "Recommended External Circuit Examples".
11. System Reset
Parameter
Symbol Condition Min.
Hardware reset signal
input width
t_RSTN
RSTN pin
1
Software reset
SRST
register
Typ.
Max.
Unit Remarks
µs
*1)
*2)
*1) After power-on, be sure to perform a hardware reset operation (register initialization). The
system is reset by a low pulse input of 1μs (min.) and enters the normal operation state. At this
moment, the digital (DI) pins are set as follows: RSTN pin to high, MSKDATA pin to low, SCLK
pin to high, DIR pin to low.
tRSTN
RSTN
V_IH
V_IL
*2) When data 0xAA:10101010 is written to the SRST[7:0] register, software reset is performed.
This setting initializes the registers and the operation mode is set to mode 0 (power down).
After software reset is completed, this register comes to “0”.
MS1289-E-02
-9-
2012/06