AK2346A Datasheet, PDF (32/37 Pages) Asahi Kasei Microsystems – Two-way Radio Audio Processor

ASAHI KASEI
[AK2346A]
(4) Monitoring low level of MSKDATA pin, set RXSW=0 for audio signal mute. Then set FSL=1 for
received flag (RDF), signal put out from MSKDATA pin.
(Between C and D)
(5) After 8 bit received data (MD7…0) have been entered to the internal buffer from node RDATA,
MSKDATA pin goes to low level as RDF mode.
(Point D)
(6) After CPU detects this low level at MSKDATA pin, please puts in 8 clock to SCLK pin. Then
modulated data (RD7…0) put out from DI/O pin synchronized with falling edge of SCLK clock.
(Interval E)
(7) After 8 clock have been put into SCLK pin completely, MSKDATA pin goes to high level that
shows all modulated data coming from DI/O pin.
(Point F)
(8) By repeating the steps (4), (5), (6), the data come out from DI/O pin continuously.
(9) After the necessary data have been read, DIR pin sets to high level and FCLN=0. Then
internal node RCLK and RDATA are set to “1” for initializing and system waits for the next
synchronization frame data.
(Interval G)
This frame detection circuit does not have reset function. In case of stopping the sequence
during the steps (1) to (8), please set again from the first step (1). Especially, when
MSKDATA pin goes out low level on frame detecting, FCLN register is sets to “1” automatically
as written in (2). If you set FCLN=0 during this operation, the date set “0” is ignored. So
please set the data again after MSKDATA pin puts out high level.
2.2) When frame detection is not used
(1) When frame detection is not used, set MSKSW1 to 1 and MSKSW0 to 0 to start MSK
reception.
(2) When the MSK signal is received on the RXIN pin, demodulated data is output successively
on the MSKDATA pin via MSK-BPF and MSK-Demodulator in synchronization with the falling
edge of the 1200Hz or 2400Hz clock signal output on the MSKCLK pin.
(3) Setting MSKSW1=1 and MSKSW0=1, reception mode comes to a stop. High level is output
on the MSKDATA pin and MSKSW0 comes to High-Z. At this time input High level or Low
level to MSKDATA pin.
MS1289-E-02
- 32 -
2012/06