AKD4705A-A Datasheet, PDF (8/34 Pages) Asahi Kasei Microsystems – AK4705A Evaluation Board Rev.0

[AKD4705A-A]
DIP-switch (S1) List
No. Switch Default
Name
1 CM0 OFF
2 DIF2 ON
3 DIF0 ON
4
-
OFF
5
-
OFF
Function
S/P DIF mode (Refer the evaluation mode)
24 bit I2S mode (Refer the evaluation mode)
(Reserved)
(Reserved)
Table 5. DIP-switch list (DIF1=“L”)
Jumper List
No. Jumper Name
Function
MCLK source set-up when CM0=”H”.
1 EXT
Open: X’tal (Default).
Short: External clock via BNC (J1). Remove the on-board X’tal.
Clock source set-up
2,3, MCLK, BICK,
Short: Connect the DIR (AK4112B). (Default)
4,5 LRCK, SDTI
Open: Separate the DIR. Supply clocks via Port1.
6 RX
S/PDIF’s port set-up when CM0=”L”.
TORX: Optical connector PORT2. (Default)
BNC: BNC connector J2.
Analog ground and digital ground
7 GND
Open: separated (Default).
Short: connected (The connector “DGND” can be open.).
Power supply source set-up for digital section of AKD4705A-A.
8 D-A
Open: from the “D5V” Jack.
Short: from the regulator or the “+5V” Jack. Don’t connect anything to the “D5V” Jack. (Default)
Power supply source set-up for VD of AK4705A.
9 REG
Open: from the “+5V” Jack.
Short: from the regulator. Don’t connect anything the “+5V” Jack. (Default)
Power supply source set-up for VVD1 of AK4705A.
10 VVD1
Open: from the “VVD1” Jack.
Short: from the regulator or the “+5V” Jack. Don’t connect anything to the “VVD1” Jack. (Default)
11 VVD2
Power supply source set-up for VVD1 of AK4705A.
Open: from the “VVD2” Jack.
Short: from the regulator or the “+5V” Jack. Don’t connect anything to the “VVD2” Jack. (Default)
12 VCRRC
Input Selection for VCRRC
“I” side: Input to VCRRC from VCRRC jack. (Default)
“I/O” side: Input to VCRC from VCRC jack.
(Note: Refer CIO bit of AK4705A)
Table 6. Jumper list
<KM091000>
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2007/09