AK2303LV Datasheet, PDF (8/41 Pages) Asahi Kasei Microsystems – Dual PCM CODEC for PBX Analog Line Card

ASAHI KASEI
[AK2303LV]
CIRCUIT DESCRIPTION
Block
AMPT0,1
AMPR0,1
AAF0,1
A/D
D/A
SMF
BGREF
GA0T/R
GA1T/R
GATN
SERIAL I/F
PLL
PCM I/F
Function
Op-amp for input gain adjustment. The gain is adjusted with external resistors.
The resistor larger than 10kΩ is recommended for the feedback resistor.
Op-amp for output gain adjustment. This op-amp is used as an inverting
amplifier. The gain is adjusted with external resistors. The resistor larger than
10kΩ is recommended for the feedback resistor.
Integrated anti-aliasing filter which prevents signals around the sampling rate
from folding back into the voice band. AAF is a 2nd order RC low-pass filter.
Converts analog signal to 8bit PCM data according to the companding schemes of
ITU recommendation G.711; A-law or u-law. The band limiting filter is also
integrated. The selection of companding schemes is set by ALAWN register or
hard pin as follows:
"H": u-Law
"L": A-Law
Expands 8bit PCM data according to A-law or u-law. The selection of
companding schemes is set by ALAWN register or hard pin as follows:
"H": u-Law
"L": A-Law
Extracts the inband signal from D/A output. It also corrects the sinx/x effect of
D/A output.
Provides the stable analog ground voltage using an on-chip band-gap reference
circuit which is temperature compensated. The output voltage is 1.5V for +3.3V
operation.
Gain selects of analog I/O signals. It is posibble to select gain from +6dB to -18dB
(1dB/step). Gain is defined by the internal register.
Interface to the internal register by using SCLK, DATA, and CSN pins.
PLL generates system clock of AK2303LV. Reference clock is BCLK. More than
0.22uF capacitance should be connected between LPC and VSS as a PLL Loop
filter.
PCM data rate is available for 4.096, 2.048MHz which synchronizes with BCLK.
Three kinds of data format (Long Frame, Short Frame,GCI) are available.
Data format is selected by the register “PCM IF”.
PCM IF = “L” LongFrame or ShortFrame (LF/SF are selected automatically)
PCM IF = “H” GCI
PCM data stream, which includes B1 and B2 data, is output through DX pin
and input through DR pin. B2 PCM data stream always follows B1 PCM data
stream.
B1/B2 and Ch0/Ch1 assignment is changed by the SEL2B
2303-E-00
8
2001/09