AKD4563A Datasheet, PDF (7/26 Pages) Asahi Kasei Microsystems – Evaluation board Rev.A for AK4563A

ASAHI KASEI
[AKD4563A]
„ DIP Switch set up
[SW3] (MODE): Setting evaluation mode of CS8412(DIR)
ON is “1”, OFF is “0”.
Table 2. AK4563Aaudio data I/F format and setting SW3 and JP6
AK4563A
DIF1
DIF0
MODE
SW3
M0
M1
M2
0
0
16bit LSB justified
1
0
1
0
1
16bit LSB justified
1
0
1
1
0
16bit MSB justified
0
0
0
1
1
I²S Compatible
0
1
0
SW3 and AK4563A format must be same audio data format.
JP6
THR
THR
INV
THR
„ Other jumper pins set up
1. JP1 (GND) : Analog ground and Digital ground
OPEN : Separated.
SHORT : Common. (The connector “DGND” can be open.) <default>
2. JP2 (VT) : D2V and VT
OPEN : Separated. <default>
SHORT : Common. (The connector “VT” can be open.)
3. JP6 (PHASE) : Phase of BCLK using DIR
THR : BCLK is coincides with AK4563A. (16bit LSB justified and I²S compatible for DAC.)
INV : BCLK is inverted. (16bit MSB justified for DAC.)
4. JP7 (SDTO) : Analog ground and Digital ground
*Always open.
5. JP8 (SD0/1) : Select SDTO0 or SDTO1
SD0 : Select SDTO0.
SD1 : Select SDTO1.
„ The function of the toggle SW
Upper-side is “H” and lower-side is “L”.
[SW1] (PDN): Power down of AK4563A. Keep “H” during normal operation.
[SW2] (DIT): Power down of AK4353. Keep “H” during normal operation.
„ Indication for LED
[LED1] (VERF): Monitor VERF pin of the CS8412. LED turns on when some error has occurred to CS8412.
[LED2] (PREM): Indicate whether the input data of CS8412 is pre-emphasized or not.
<KM064400>
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