AKD4563A Datasheet, PDF (5/26 Pages) Asahi Kasei Microsystems – Evaluation board Rev.A for AK4563A

ASAHI KASEI
[AKD4563A]
2) Evaluation of D/A using A/D converted data from ideal sine wave generated by ROM data.
Digital signals generated by AKD43XX are used. PORT3 is used for the interface with AKD43XX. Master
clock is sent from AKD4563A to AKD43XX and BCLK, LRCK, SDTI are sent from AKD43XX to
AKD4563A. Nothing should be connected to PORT1, PORT4. In case of using external clock through a
BNC connector (J1), select EXT on JP11 (CLK) and short JP12 (XTE).
JP3
X_BCLK
JP4
LRCK
JP5
BCLK
JP9
SDTI
JP10
DIR
JP11
CLK
JP12
XTE
32fs 64fs ADC DIR ADC DIR ADC DIR VD GND
3) Evaluation of D/A using A/D converted data.
It is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various
AKM’s A/D evaluation boards with PORT3. Nothing should be connected to PORT1, PORT4. In case of
using external clock through a BNC connector (J1), select EXT on JP11 (CLK) and short JP12 (XTE).
JP3
X_BCLK
JP4
LRCK
JP5
BCLK
JP9
SDTI
JP10
DIR
JP11
CLK
JP12
XTE
32fs 64fs ADC DIR ADC DIR ADC DIR VD GND
4) Evaluation of D/A using DIR. (Optical link)
PORT4 (DIR) is used. DIR generates MCLK, BCLK, LRCK and SDATA from the received data through
optical connector (TORX176). Used for the evaluation using CD test disk. Nothing should be connected to
PORT1, PORT3.
JP3
X_BCLK
JP4
LRCK
JP5
BCLK
JP9
SDTI
JP10
DIR
JP11
CLK
JP12
XTE
32fs 64fs ADC DIR ADC DIR ADC DIR VD GND
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