AK4642VN Datasheet, PDF (60/82 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4642]
Addr
03H
Register Name
Signal Select 2
Default
D7
D6
D5
D4
D3
D2
D1
D0
LOVL LOPS MGAIN1 SPKG1 SPKG0 BEEPL
0
0
0
0
0
0
0
0
0
0
BEEPL: εςϨΦϥΠϯΞ΢τΞϯϓ ʹೖྗ͞ΕΔBEEP৴߸ͷίϯτϩʔϧ
0: OFF (Default)
1: ON
PMLO bit = “1”ͷ࣌ɺ͜ͷϏοτ͸༗ޮʹͳΓ·͢ɻPMLO bit = “0”ͷ࣌ɺLOUT, ROUT pins͸AVSS
Λग़ྗ͠·͢ɻ
SPKG1-0: εϐʔΧΞϯϓग़ྗήΠϯͷઃఆ(See Table 41)
MGAIN1: ϚΠΫΞϯϓͷήΠϯίϯτϩʔϧ(See Table 16)
LOPS: εςϨΦϥΠϯग़ྗͷύϫʔηʔϒϞʔυ
0: Normal Operation (Default)
1: Power Save Mode
LOVL: εςϨΦϥΠϯग़ྗήΠϯઃఆ(Table 37)
0: 0dB (Default)
1: +2dB
Addr
04H
Register Name
Mode Control 1
Default
D7
D6
D5
D4
D3
D2
PLL3 PLL2 PLL1 PLL0 BCKO
0
0
0
0
0
0
0
DIF1-0: ΦʔσΟΦΠϯλϑΣʔεϑΥʔϚοτ (See Table 13)
Default: “10” (લ٧Ί)
BCKO: ϚελϞʔυ࣌ͷBICKग़ྗप೾਺ͷઃఆ (See Table 10)
PLL3-0: PLLج४ΫϩοΫͷબ୒(See Table 4)
Default: “0000”(LRCK pin)
D1
DIF1
1
D0
DIF0
0
Addr
05H
Register Name
Mode Control 2
Default
D7
D6
D5
D4
D3
D2
D1
D0
PS1
PS0
FS3
0
0
FS2
FS1
FS0
0
0
0
0
0
0
0
0
FS3-0: αϯϓϦϯάप೾਺(See Table 5 and Table 6)ͼٴMCKIप೾਺ͷઃఆ(See Table 11)
PLLϞʔυ࣌͸αϯϓϦϯάप೾਺ͷઃఆΛߦ͍ɺEXTϞʔυ࣌͸MCKIͷೖྗप೾਺Λઃఆ͠·
͢ɻ
PS1-0: MCKOप೾਺ͷઃఆ(Table 9)
Default: “00”(256fs)
MS0358-J-02
- 60 -
2005/04