AK4642VN Datasheet, PDF (15/82 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4642]
DCಛੑ

(Ta=25°C; AVDD, DVDD=2.6 ∼ 3.6V; HVDD=2.6 ∼ 5.25V)
Parameter
Symbol
min
typ
Max
Units
High-Level Input Voltage
Low-Level Input Voltage
VIH 70%DVDD
-
-
V
VIL
-
-
30%DVDD V
High-Level Output Voltage
(Iout=−200µA) VOH DVDD−0.2
-
Low-Level Output Voltage
(Except SDA pin: Iout=200µA) VOL
-
-
(SDA pin: Iout=3mA) VOL
-
-
-
V
0.2
V
0.4
V
Input Leakage Current
Iin
-
-
±10
µA
εΠονϯάಛੑ
(Ta=25°C; AVDD, DVDD=2.6 ∼ 3.6V; HVDD=2.6 ∼ 5.25V; C_L=20pF)
Parameter
Symbol
min
PLL Master Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency
fCLK
Pulse Width Low
tCLKL
Pulse Width High
tCLKH
11.2896
0.4/fCLK
0.4/fCLK
MCKO Output Timing
Frequency
Duty Cycle
Except 256fs at fs=32kHz, 29.4kHz
256fs at fs=32kHz, 29.4kHz
LRCK Output Timing
Frequency
Duty Cycle
BICK Output Timing
Period
BCKO bit = “0”
BCKO bit = “1”
Duty Cycle
fMCK
dMCK
dMCK
fs
Duty
tBCK
tBCK
dBCK
0.2352
40
-
7.35
-
-
-
-
PLL Slave Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency
fCLK
Pulse Width Low
tCLKL
Pulse Width High
tCLKH
11.2896
0.4/fCLK
0.4/fCLK
MCKO Output Timing
Frequency
Duty Cycle
Except 256fs at fs=32kHz, 29.4kHz
256fs at fs=32kHz, 29.4kHz
LRCK Input Timing
Frequency
Duty
BICK Input Timing
Period
Pulse Width Low
Pulse Width High
fMCK
0.2352
dMCK
40
dMCK
-
fs
7.35
Duty
45
tBCK
tBCKL
tBCKH
1/(64fs)
0.4 x tBCK
0.4 x tBCK
typ
-
-
-
-
50
33
-
50
1/(32fs)
1/(64fs)
50
-
-
-
-
50
33
-
-
-
-
-
max
Units
27
-
-
12.288
60
-
48
-
-
-
-
MHz
ns
ns
MHz
%
%
kHz
%
ns
ns
%
27
-
-
12.288
60
-
48
55
1/(32fs)
-
-
MHz
ns
ns
MHz
%
%
kHz
%
ns
ns
ns
MS0358-J-02
- 15 -
2005/04