AK4642VN Datasheet, PDF (25/82 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4642]
„ PLLͷΞϯϩοΫʹ͍ͭͯ
1) PLL Master Mode (PMPLL bit = “1”, M/S bit = “1”)
͜ͷϞʔυͰ PMPLL bit = “0” Æ “1”ޙͨ͠ʹPLL͕ϩοΫ͢Δ·ͰͷؒɺBICKͱLRCK͸ “L”Λग़ྗɺMCKO
bit = “1”ͷͱ͖MCKO pin͔Β͸ਖ਼ৗͰͳ͍प೾਺ͷΫϩοΫ͕ग़ྗ͞Ε·͢ɻMCKO bit = “0”ͷ৔߹͸ɺ
MCKO pin͸ “L”Λग़ྗ͠·͢ɻ(See Table 7)
PLLϩοΫޙɺBICKͱLRCKग़ྗ͸ “L”͔ΒΫϩοΫग़ྗͱͳΓ·͢ͷͰ࠷ॳͷ1पظ෼ͷLRCK, BICK͸ɺ
ਖ਼ৗͰͳ͍Մೳੑ͕͋Γ·͕͢ɺ1fsʹޙ͸ਖ਼ৗͳΫϩοΫʹͳΓ·͢ɻ
αϯϓϦϯάप೾਺Λมߋ͢Δ৔߹͸Ұ౓PMPLL bit = “0”ʹ͢Δ͜ͱͰΞϯϩοΫঢ়ଶͷෆఆͳBICK,
LRCKΛग़ྗͤͣ͞ʹ “L”Λग़ྗͤ͞Δ͜ͱ͕Ͱ͖·͢ɻ
PLL State
PMPLL bit “0” Æ “1”௚ޙ
MCKO pin
MCKO bit = “0” MCKO bit = “1”
“L” Output
ෆఆ
BICK pin
“L” Output
LRCK pin
“L” Output
PLL Unlock ࣌(ه্Ҏ֎)
“L” Output
ෆఆ
ෆఆ
ෆఆ
PLL Lock ࣌
“L” Output
See Table 9
See Table 10
1fs Output
Table 7. Clock Operation at PLL Master Mode (PMPLL bit = “1”, M/S bit = “1”)
2) PLL Slave Mode (PMPLL bit = “1”, M/S bit = “0”)
͜ͷϞʔυͰ͸ PMPLL bit = “0” Æ “1”ޙͨ͠ʹPLL͕ϩοΫ͢Δ·ͰͷؒɺMCKO͔Β͸ਖ਼ৗͰͳ͍प೾਺
ͷΫϩοΫ͕ग़ྗ͞Ε·͢ɻͦͷޙɺPLL͕ϩοΫ͢ΔͱMCKO pin͔ΒTable 9Ͱબ୒͞ΕͨΫϩοΫ͕ग़ྗ
͞Ε·͢ɻୠ͠ɺPLL͕ΞϯϩοΫʹͳͬͨ৔߹ɺADCͼٴDAC͔Β͸ਖ਼ৗͳσʔλ͕ग़ྗ͞Ε·ͤΜɻDAC
ʹؔͯ͠͸ɺDACL, DACH, DACS bitsΛ “0”ʹ͢Δ͜ͱʹΑΓग़ྗΛϛϡʔτ͢Δ͜ͱ͕ՄೳͰ͢ɻ
PLL State
MCKO pin
MCKO bit = “0” MCKO bit = “1”
PMPLL bit “0” Æ “1”௚ޙ
“L” Output
ෆఆ
PLL Unlock ࣌(ه্Ҏ֎)
“L” Output
ෆఆ
PLL Lock ࣌
“L” Output
Output
Table 8. Clock Operation at PLL Slave Mode (PMPLL bit = “0”, M/S bit = “0”)
MS0358-J-02
- 25 -
2005/04