AK4586 Datasheet, PDF (51/54 Pages) Asahi Kasei Microsystems – MULTI CHANNEL AUDIO CODEC WITH DIR

ASAHI KASEI
[AK4586]
SYSTEM DESIGN
Figure 34 shows the system connection diagram. An evaluation board is available which demonstrates application
circuits, the optimum layout, power supply arrangements and measurement results.
Condition: TVDD=3.3V, Master mode, 4-wire serial control mode, DZFM2-0 = “100”
Power-down
Control
Digital 3.3V
(S/PDIF out)
Audio
DSP
(MPEG/
AC3)
(S/PDIF sources)
5
+ _10u
0.1u
C X’tal
C
10u 0.1u
+
+
10u 0.1u
1 XTO
2 XTI
3 DVDD
4 DVSS
5 TVDD
6 TX
7 MCKO
8 LRCK
9 BICK
10 SDTO
11 SDTI1
AK4586
RIN 33
LIN 32
ROUT1 31
LOUT1 30
ROUT2 29
LOUT2 28
ROUT3 27
LOUT3 26
DZF1 25
VCOM 24
VREFH 23
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
0.1u 2.2u
+
+ ^0.1u
10u
5
µP
Digital Ground
Analog Ground
Analog 5V
Figure 34. Typical Connection Diagram
Notes:
- “C” depends on the crystal.
- AVSS, DVSS and PVSS must be connected the same analog ground plane.
- Digital signals, especially clocks, should be kept away from the R pin in order to avoid an effect to the clock jitter
performance.
- In case of coaxial input, ground of RCA connector and terminator should be connected to PVSS of the AK4586 with
low impedance on PC board.
MS0097-E-01
- 51 -
2001/12