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AK4586 Datasheet, PDF (24/54 Pages) Asahi Kasei Microsystems – MULTI CHANNEL AUDIO CODEC WITH DIR | |||
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ASAHI KASEI
[AK4586]
Error Handling
There are the following eight factors which INT1-0 pins go to âHâ.
1. UNLOCK: â1â when the PLL goes UNLOCK state.
The AK4586 loses lock when the distance between two preambles is not correct or when those
preambles are not correct.
2. PAR: â1â when parity error or biphase coding error is detected.
Updated every sub-frame cycle. Reading this register resets itself.
3. AUTO: â1â when Non-PCM Bit Stream is detected.
4. DTSCD: â1â when DTS-CD Bit Stream is detected.
5. AUDION: â1â when the âAUDIOâ bit in recovered channel status indicates â1â.
6. STC: â1â when FS1, FS0 or PEM bit changes. Reading this register resets itself.
7. V:
â1â when validity flag is detected.
8. RFS96: â1â when fs=88.2kHz or more (RFS96 bit is set by XFS96 bit at xâtal mode or AFS96= â0â).
INT1-0 pins output the ORed signal among those eight factors. However, each factor can be masked by each mask bit.
When each bit masks those factors, the factor does not affect INT1-0 pins operation (those masks do not affect those
resisters (UNLOCK, PAR, etc.) themselves). Once INT0 pin goes to âHâ, it maintains âHâ for 1024 cycles (this value can
be changed by EFH1-0 bits) after the all factors are removed. Once the PAR bit goes to â1â, it holds â1â until reading the
register. While the AK4586 loses lock, the channel status bits are not updated and hold the previous data. At initial state,
INT0 outputs the ORed signal between UNLOCK and PAR. INT1 outputs the ORed signal among AUTO, DTSCD,
AUDION and V. INT1-0 pins are âLâ when the PLL is OFF (Clock Operation Mode 1).
Register
UNLOCK PAR AUTO DTSCD AUDION STC
1
x
x
x
x
x
0
1
x
x
x
x
0
0
1
x
x
x
0
0
x
1
x
x
0
0
x
x
1
x
0
0
x
x
x
1
0
0
x
x
x
x
0
0
x
x
x
x
Pin
V RFS96
SDTO
TX
x
x
âL"
Output
x
x
Previous Data Output
x
x
Output
Output
x
x
Output
Output
x
x
Output
Output
x
x
Output
Output
1
x
Output
Output
x
1
Output
Output
Table 13. Error handling
MS0097-E-01
- 24 -
2001/12
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