AK7738VQ Datasheet, PDF (5/42 Pages) Asahi Kasei Microsystems – Multi DSP with 5ch ADC + 4ch DAC + 8ch SRC

[AK7738]
■ DSP1 Block Diagram
Pointer CP0, CP1
DP0, DP1
Coefficient RAM
6144w×24Bit max
2048w Unit
Data RAM
6144w x 28Bit max
2048w Unit
CBUS(24Bit)
DBUS(28Bit)
DLP0, DLP1
OFREG
64w x 15Bit
Delay RAM
20480w x 28Bit max
4096w Unit
MPX24
MPX24
X
Y
Multiply
24×24 → 48Bit
48Bit
28Bit
52Bit
MUL DBUS
SHIFT
48Bit
A
B
ALU
52Bit
Overflow Margin: 4Bit
52-Bit
DR0  3
52Bit
Over Flow Data
Generator
Micon I/F
Control
Serial I/F
DEC
Program RAM
8192w×36Bit max
2048w Unit
PC
Stack: 5 Level (max)
TMP 12×28Bit
PTMP(LIFO) 6×28Bit
2 x 24Bit
2 x 24Bit
2 x 24Bit
2 x 24Bit
2 x 24Bit x fifo12
2 x 24Bit x fifo12
DIN6
DIN5
DIN4
DIN3
DIN2
DIN1
2 x 32Bit
2 x 32Bit
2 x 32Bit
2 x 32Bit
2 x 32Bit x fifo12
2 x 32Bit x fifo12
DOUT6
DOUT5
DOUT4
DOUT3
DOUT2
DOUT1
28bit x fifo16 DTMP (Connect to DSP2)
28bit x fifo8 CTMP (Connect to Sub DSP)
Division 2424→24 _{Peak Detector}
Figure 2. DSP1 Block Diagram (Note 1)
Note 1. Coefficient RAM, Data RAM, Delay RAM, Program RAM areas are shared by DSP1 and DSP2 and
the sizes are configurable by control registers.
015000122-E-00-PB
-5-
2015/01