AK7738VQ Datasheet, PDF (32/42 Pages) Asahi Kasei Microsystems – Multi DSP with 5ch ADC + 4ch DAC + 8ch SRC

[AK7738]
11. Switching Characteristics
1. System Clock
(Ta=25C; AVDD=3.0~3.6V; LVDD=3.0~3.6V; TVDD1=1.7~3.6V; TVDD2=1.7~3.6V;
VDD33=3.0~3.6V; AVSS=DVSS1=DVSS2=DVSS3=0V; CL=20pF)
Parameter
Symbol
min
typ
max
XTI Input Timing
a) X’tal Oscillator
Input Frequency
b) XTI Clock Input
Duty Cycle
Input Frequency
fXTI
fXTI
11.2896
40
0.256
18.432
50
60
24.576
CLKO Output Timing
Output Frequency
fCLKO
2.048
24.576
Duty Cycle
dCLKO
50
LRCK/BICK Input Timing (Slave Mode)
LRCK Input Timing
Frequency
fs
8
192
BICK Input Timing
Frequency
Pulse Width Low
Pulse Width High
(Note 44)
fBCLK
tBCLKL
tBCLKH
0.256
0.4/fBCLK
0.4/fBCLK
24.576
LRCK/BICK Output Timing (PLL Master Mode)
LRCK Output Timing
Frequency
fs
8
192
Pulse Width High
PCM Mode
tLRCKH
1/fBCLK
Except PCM Mode
tLRCKH
50
BICK Output Timing
Frequency
(Note 44) fBCLK
0.256
24.576
Duty
dBCLK
50
Note 44. Required to meet the following expression: fBCLK ≥ 2 x fs x (Input/Output Data Length).
Unit
MHz
%
MHz
MHz
%
kHz
MHz
ns
ns
kHz
ns
%
MHz
%
015000122-E-00-PB
- 32 -
2015/01