|
AK5552VN_16 Datasheet, PDF (49/68 Pages) Asahi Kasei Microsystems – 2-Channel Differential 32-bit ADC | |||
|
◁ |
[AK5552]
[2] Serial Mode
In 3-wire serial mode or I2C mode, PW1-2 bits control the power of AIN1-2 channels independently. AINn
channel is powered down when PWn bit = â0â (n=1-2) and AINn channel is in normal operation when
PWn bit = â1â. The power-down channel is reset status and outputs all â0â. The 2-to-1 mode is controlled
by MONO2-1 bits. RSTN bit must be â0â when changing the setting of MONO1-2 bits and PW1-2 bits.
MONO2
MONO1
Data on Slot (Normal Output)
bit
bit
Slot 2
Slot 1
0
0
CH2
CH1
0
1
(CH1+2)/2
(CH1+2)/2
1
0
CH2
CH1
1
1
All â0â
(CH1+2)/2
Table 17. Slot Data Assign (Serial Control mode, Normal Output or DSD mode)
MONO2
MONO1
Data on Slot (TDM Output)
bit
bit
Slot 2
Slot 1
0
0
CH2
CH1
0
1
(CH1+2)/2
(CH1+2)/2
1
0
CH2
CH1
1
1
TDMIN
(CH1+2)/2
Table 18. Slot Data Assign (Serial Control mode, TDM128)
MONO2
bit
MONO1
bit
Data on Slot (TDM Output)
Slot 2
Slot 1
0
0
CH2
CH1
0
1
(CH1+2)/2
(CH1+2)/2
1
0
CH2
CH1
1
1
TDMIN
(CH1+2)/2
Table 19. Slot Data Assign (Serial Control mode, TDM256 & TDM512)
015099871-E-00
- 49 -
2016/03
|
▷ |