AK5552VN_16 Datasheet, PDF (47/68 Pages) Asahi Kasei Microsystems – 2-Channel Differential 32-bit ADC

[AK5552]
PW2 PW1 PW0 Power ON/OFF
pin pin pin Ch2 Ch1
L
L
L OFF OFF
L
L
H
ON OFF
L H L OFF ON
L
HH
ON
ON
H
L
L OFF OFF
H
L
H
ON OFF
H H L OFF ON
H
HH
ON
ON
Table 11. Channel Power ON/OFF (Parallel Control Mode, ODP pin= “L”)
PW2 PW1 PW0
Data on Slot
pin
pin
pin
Slot 2
Slot 1
L
L
L
All “0”
All “0”
L
L
H
CH2
All “0”
L
H
L
All “0”
CH1
L
H
H
(CH1+2)/2
(CH1+2)/2
H
L
L
All “0”
All “0”
H
L
H
CH2
All “0”
H
H
L
All “0”
CH1
H
H
H
CH2
CH1
Table 12. Slot Data Assign (Parallel Control Mode, ODP pin= “L”)
When the ODP pin = “H”, the AK5552 becomes optimal data placement mode and data slots can be used
efficiently. The PW2-0 pins control power down, 2-to-1 mode.
In 2-to-1 mode, AIN1 and AIN2 channel data are summed digitally and output from the SDTO1
(DSDOL1) by dividing into half amplitude.
PW2 PW1 PW0 Power ON/OFF
pin pin pin Ch2
Ch1
L
L
L
OFF OFF
L
L
H
ON
ON
L
H
L
ON
ON
LHH
ON
ON
H
L
L
ON
ON
H
L
H
ON
ON
H
H
L
ON
ON
HHH
ON
ON
Table 13. Channel Power ON/OFF (Parallel Control mode, ODP pin= ”H”)
015099871-E-00
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2016/03