AK5552VN_16 Datasheet, PDF (41/68 Pages) Asahi Kasei Microsystems – 2-Channel Differential 32-bit ADC

LRCK (Master)
128 BICK
LRCK (Slave)
BICK (256fs)
SDTO1 (O)
23 22 0 23 22 0
23 22
Data 1 Data 2
32 BICK 32 BICK
[AK5552]
Figure 42. Mode 24/28 Timing (TDM128 mode, MSB Justified, 24-bit)
LRCK (Master)
128 BICK
LRCK (Slave)
BICK (256fs)
SDTO1 (O)
23 22 0 23 22 0
23 22
Data 1
32 BICK
Data 2
32 BICK
Figure 43. Mode 25/29 Timing (TDM128 mode, I²S Compatible)
128 BICK
LRCK (Master)
LRCK (Slave)
BICK (256fs)
SDTO1 (O)
0 31 30 1 0 31 30 1 0
31 30
Data 1
32 BICK
Data 2
32 BICK
Figure 44. Mode 26/30 Timing (TDM128 mode, MSB Justified)
015099871-E-00
- 41 -
2016/03