AK5572 Datasheet, PDF (40/68 Pages) Asahi Kasei Microsystems – 2-Channel Differential 32-bit ADC

[AK5572]
LRCK (Master)
64 BICK
LRCK (Slave)
BICK (64fs)
SDTO1 (O)
23 22 15 8 7
0 23 22 15 8 7
0 23 22
AIN1 Data
32 BICK
AIN2 Data
32 BICK
Figure 38. Mode 12/20 Timing (Normal mode, OCT/HEX Speed mode, MSB Justified, 24-bit)
LRCK (Master)
64 BICK
LRCK (Slave)
BICK (64fs)
SDTO1 (O)
23 22 15 8 7
0 23 22 15 8 7
0 23 22
AIN1 Data
32 BICK
AIN2 Data
32 BICK
Figure 39. Mode 13/21 Timing (Normal mode, OCT/HEX Speed mode, I²S Compatible, 24-bit)
LRCK (Master)
64 BICK
LRCK (Slave)
BICK (64fs)
SDTO1 (O)
0 31 30 17 16 15 14 1 0 31 30 17 16 15 14 1 0 31 30
AIN1 Data
32 BICK
AIN2 Data
32 BICK
Figure 40. Mode 14/22 Timing (Normal mode, OCT/HEX Speed mode, MSB Justified, 32-bit)
64 BICK
LRCK (Master)
LRCK (Slave)
BICK (64fs)
SDTO1 (O)
0 31 30 17 16 15 14 1 0 31 30 17 16 15 14 1 0 31 30
AIN1 Data
32 BICK
AIN2 Data
32 BICK
Figure 41. Mode 15/23 Timing (Normal mode, OCT/HEX Speed mode, I²S Compatible, 32-bit)
015016766-E-00
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2015/12