AK5572 Datasheet, PDF (19/68 Pages) Asahi Kasei Microsystems – 2-Channel Differential 32-bit ADC

[AK5572]
11. Switching Characteristics
(Ta= 40 - +105 C; AVDD= 4.75-5.25 V, TVDD= 1.7-1.98 V (LDOE pin=“L”) or 3.0-3.6 V (LDOE
pin=“H”), VDD18= 1.7-1.98 V (LDOE pin=“L”), C_L= 10 pF)
Parameter
Symbol Min.
Typ.
Max.
Unit
Master Clock Timing (Figure 18)
Frequency
Duty Cycle
fCLK
dCLK
2.048
45
-
49.152 MHz
-
55
%
LRCK Frequency (Slave mode) (Figure 17)
Normal mode (TDM1-0 bits = “00”)
Normal Speed mode
Double Speed mode
Quad Speed mode
Oct Speed mode
Hex Speed mode
Duty Cycle
fsn
8
fsd
54
fsq
108
fso
-
fsh
-
Duty
45
-
54
kHz
-
108
kHz
-
216
kHz
384
-
kHz
768
-
kHz
-
55
%
TDM128 mode (TDM1-0 bits = “01”)
Normal Speed mode
fsn
8
-
Double Speed mode
fsd
54
-
Quad Speed mode
fsq
108
-
High Time
tLRH 1/128fs
-
Low Time
tLRL 1/128fs
-
54
kHz
108
kHz
216
kHz
-
ns
-
ns
TDM256 mode (TDM1-0 bits = “10”)
Normal Speed mode
fsn
8
-
Double Speed mode
fsd
54
-
High time
tLRH 1/256fs
-
Low time
tLRL 1/256fs
-
54
kHz
108
kHz
-
ns
-
ns
TDM512 mode (TDM1-0 bits = “11”)
Normal Speed mode
fsn
8
-
High Time
tLRH 1/512fs
-
Low Time
tLRL 1/512fs
-
54
kHz
-
ns
-
ns
LRCK Frequency (Master mode) (Figure 18)
Normal mode (TDM1-0 bits = “00”)
Normal Speed mode
Double Speed mode
Quad Speed mode
Oct Speed mode
Hex Speed mode
Duty Cycle
fsn
8
-
fsd
54
-
fsq
108
-
fso
-
384
fsh
-
768
Duty
-
50
54
kHz
108
kHz
216
kHz
-
kHz
-
kHz
-
%
TDM128 mode (TDM1-0 bits = “01”)
Normal Speed mode
Double Speed mode
Quad Speed mode
High Time
fsn
8
-
54
kHz
fsd
54
-
108
kHz
fsq
108
-
216
kHz
tLRH
-
1/4fs
-
ns
TDM256 mode (TDM1-0 bits = “10”)
Normal Speed mode
Double Speed mode
High Time
fsn
8
-
54
kHz
fsd
54
-
108
kHz
tLRH
-
1/8fs
-
ns
TDM512 mode (TDM1-0 bits = “11”)
Normal Speed mode
High Time
fsn
8
-
54
kHz
tLRH
-
1/16fs
-
ns
Note 18. When the 1024fs, 512fs or 768fs /256fs or 384fs /128fs or 192fs are switched, the AK5572
should be reset by the PDN pin or RSTN bit.
015016766-E-00
- 19 -
2015/12